Rithwick Sethi

AI and HWT Intern
Advanced Technologies Group · Apple

San Diego, California, USA

I build the internal tooling my team uses to understand what their software actually does on hardware.

• Architected a four-stage pipeline that streams heavy execution traces, reconstructs concurrent resource lifetimes through stateful signal correlation, and renders 50,000+ discrete allocation blocks per trace as an interactive timeline.
• Reverse-engineered an undocumented proprietary binary trace format at the byte level to synthesize spec-valid traces from sequence diagrams; letting engineers inspect call flows before they were implemented.
• Shipped an agentic LLM system with multi-turn tool use and a live-preview feedback loop; it compiles technical documentation from natural-language intent, replacing a manual process.

Software Development Engineer
Wireless Technologies and Ecosystems · Apple

Bengaluru, India

• Performed large-scale validation and optimisation for the Non-Access Stratum (NAS) of the cellular protocol stack: the control-plane layer governing how a device registers, authenticates, and sustains sessions on 5G NR and LTE networks; building automated validation pipelines that enforce 3GPP conformance at scale.
• Developed and optimised L3 pipelines spanning registration/attach, authentication and security-mode control, tracking-area updates, and service requests, along with the registration and connection-management state machines that drive them; automated the regression coverage around them.
• Drove automated fuzzing to surface parser faults and state-machine deadlocks, and automated static analysis (Coverity) to catch null dereferences, buffer overruns, uninitialised reads and resource leaks pre-ship; backed by data-driven regression testing that mined large, complex field logs for recurring failure signatures.
• Traced end-to-end interactions from application-processor triggers down to baseband, isolating cross-layer failures to ensure robust integration across layers and cut priority-1 defects in mainline ahead of release; steadily replacing manual inspection with automated tooling.

Software Development Engineering Intern
Wireless Technologies and Ecosystems · Apple

Bengaluru, India

Brought in to build an automated framework for the tedious, error-prone process of host test case development.

• Designed and developed ULTRON, a standardised framework that cuts host test case generation from 5–6 hours to 10–15 minutes (~95%).
• Converts baseband execution logs into formatted, syntactically and logically valid test cases, then auto-populates the expected-output assertions; replacing a fully manual process.
• Built with extensible API support and adopted org-wide into Apple's internal tooling, improving efficiency, reliability, and scalability across test-development workflows.

Research Intern
MITACS, École de Technologie Supérieure (ÉTS)

Montreal, Quebec, Canada

Project: AI-based coordinated target detection and tracking with a swarm of autonomous UAVs.

• Implemented efficient deep reinforcement learning and heuristic-based AI models to coordinate a UAV swarm and allocate optimal paths for detecting and tracking unknown targets under visibility obstruction and target-motion uncertainty in urban areas; optimising for energy efficiency and optimal trajectory generation.
• Layered on computer vision for real-time recognition from live UAV camera feeds using YOLO, as well as autonomous formation flying by translating an input pattern image into waypoint sets that place each drone in formation.
• Rigorously evaluated and simulated using MATLAB/Simulink/Stateflow, Gazebo/ROS, and ArduPilot/PX4. Took this further as my main dissertation at Delhi Technological University.